The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2000

Filed:

Jan. 06, 1999
Applicant:
Inventors:

Andrew Popplewell, Manchester, GB;

Stephen Williams, Manchester, GB;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D / ; G01R / ;
U.S. Cl.
CPC ...
327-3 ; 375375 ;
Abstract

A phase detector determines an error value dependent on the relative phase between a local oscillator signal, used as the system clock, and an input signal received over a PR (a, b, a) channel. The phase error value is used to control a phase locked loop (FIG. 1, not shown). The received signal is sampled at regular intervals dependent on the local oscillator signal. A threshold slicer 22 selects an ideal sample value for a sampling point by comparing the sampled value to three thresholds provided on respective ones of slicer threshold inputs 23, 24 and 25. A subtracter 27 determines a difference value corresponding to a difference between the ideal sample value and the actual sample value for that sampling point. A delay register 28 and a subtracter 29 operate to determine the sense of change to the current ideal sample value from an ideal sample value for a preceding sample point. An output of the subtractor is applied to the switching input of a switch, which thereby provides as an output signal either the difference value or the inverse of the difference value, provided by an inverter 32, dependent on the detected sense of change.


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