Method and apparatus for performing multi-way branching using a hardware

Abstract

Multi-way branching is implemented via a single instruction by providing a computer system with a hardware token-to-address table, loading the table with branch target data correlating to the multi-way branch instruction, including software for execution with at least one multi-way branch instruction executing that branch instruction by accessing the table. The computer system is conventionally supplied with branch logic and general purpose register stack with a multi-ported output interface. The hardware resource added implementing the multi-way branch operation includes the table in the form of addressable storage comprising a plurality of multi-byte locations with a write data input and a read data output. A decoder is connected between one port of the general purpose register interface with an output to select one of the multi-byte locations for an input or output operation. The write data input of the addressable storage or table is connected to another port of the general purpose register interface. The read data output of the addressable storage is connected to the branch logic so that data may be written from a port of the general purpose registers to a location in the addressable storage determined by an associated index obtained from another port of the general purpose register and data may be selected for output from the addressable storage to the branch logic by applying an index from a port of the general purpose registers to effect a data read operation.