The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 29, 2000
Filed:
Oct. 10, 1997
Tom Hunt, Corona, CA (US);
Raymond William Hall, Riverside, CA (US);
David Thomas Ratter, Riverside, CA (US);
Signatec, Inc., Corona, CA (US);
Abstract
A modular disk memory apparatus provides a modularly expandable, multi-gigabyte auxiliary memory for a computer or other host electronic device, and includes multiple, parallel serial data channels to maximize bidirectional data transfer rates between the apparatus and the host device. Maximization of READ/WRITE data transfer rates within the apparatus is achieved by utilizing a large number of small hard disk drives, typically eight 2.5-inch drives on each of a plurality of Disk Storage Modules, each including a plug-in printed circuit board capable of holding two 5-1/4 inch drives, thereby increasing the maximum data transfer rate per unit volume of the modules by a factor of two. Maximization of bidirectional data transfer rates between the apparatus and host device over that attainable using a single serial data channel such as a coaxial, quadaxial or fiber optic cable, is achieved by parsing or demultiplexing data to be transmitted from a single parallel channel onto p paralleled cables, thereby increasing the maximum transmittal rate by p. Data received over the parallel data channels is multiplexed or concatenated to comprise a data stream on a single parallel channel. Reconstruction data is embedded in data contained in the p parallel data channels specifying the number q of channels employed, where 1.ltoreq.q.ltoreq.p thereby configuring the demultiplexer to concatenate that number of data channels onto a single parallel data bus.