The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2000

Filed:

May. 11, 1999
Applicant:
Inventor:

Hironori Nakamura, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518511 ; 36518901 ; 36523001 ; 36523003 ; 3652385 ;
Abstract

An electrically erasable and programmable read only memory device changes all the memory cells of plural sectors to write-in state through repetition of a multi-write operation before a data erasing, and plural memory cells are concurrently changed to the write-in state through the multi-write-in operation, wherein memory cells for storing a byte of data are concurrently selected from each of the sectors, and electric current flows through the selected memory cell groups and associated source lines into plural switching transistors respectively connected to the source lines so that the plural switching transistors prevent the potential level on the source lines from undesirable floating-up.


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