The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 29, 2000

Filed:

Mar. 02, 1998
Applicant:
Inventors:

Robert B Hall, Newark, DE (US);

Allen M Barnett, Newark, DE (US);

Sandra R Collins, Chesapeake City, MD (US);

Joseph C Checchi, Newark, DE (US);

David H Ford, Wilmington, DE (US);

Christopher L Kendall, Hockessin, DE (US);

James A Rand, Landenberg, PA (US);

Chad B Moore, Corning, NY (US);

Assignee:

AstroPower, Inc., Newark, DE (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
1362 / ; 148 332 ; 148D / ; 438 89 ; 438 97 ; 438488 ; 428620 ;
Abstract

The invention relates to improved techniques for manufacturing columnar-grained polycrystalline sheets which have particular utility as substrates or wafers for solar cells. The sheet is made from silicon on a setter material which supports the silicon material. The setter material and silicon are subjected to a thermal profile all of which promote columnar growth. The thermal profile sequentially creates a melt region where a thin-film capping layer grows at the top of the silicon, a nucleation region where preferential nucleation occurs at the capping-layer/molten-silicon interface, and then a growth region where both liquid and a growing polycrystalline sheet layer coexist. An annealing region is created where the temperature of the grown polycrystalline silicon sheet layer is controllably reduced to effect stress relief.


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