The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 2000
Filed:
Jul. 22, 1999
Robert D Lee, Denton, TX (US);
Stephen M Curry, Dallas, TX (US);
Michael L Bolan, Dallas, TX (US);
Hal Kurkowski, Dallas, TX (US);
Donald R Diaz, Carrollton, TX (US);
Francis A Scherpenberg, Dallas, TX (US);
Kevin E Deierling, Los Altos Hills, CA (US);
Dallas Semiconductor Corporation, Dallas, TX (US);
Abstract
A system architecture which provides efficient data communication, over a one-wire bus, with a portable data module which does not necessarily include any accurate time base whatsoever. The time base in the module can be extremely crude (e.g. more than 4:1 uncertainty). An open-collector architecture is used, with electrical relations defined to absolutely minimize the drain on the portable module's battery. The protocol has been specified so that the module never sources current to the data line, but only sinks current. The protocol includes signals for read; write-zero; write-one; and reset. Each one-bit transaction is initiated by a falling edge from the host. The time base in the module defines a delay, after which (in write mode) the module tests the data state of the data line. In read mode, after a falling edge the module does or does not turn on its pull-down transistor, depending on the data value. Thus, the host system, after the falling edge, attempts to pull the data line high again, and then tests the potential of the data line to ascertain the data value.