The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 22, 2000
Filed:
Jan. 23, 1998
Yukihisa Orisaka, Tenri, JP;
Hideki Morii, Naga-gun, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
A level converting circuit converts the level of an input signal to a positive or a negative level according to a power source voltage for supplying a voltage of a reference level for the input signal. In the level converting circuit, a first transistor has a source supplied with a first voltage, and a drain supplied with a second voltage via a loading circuit. Conduction and cutoff of the first transistor is determined on the basis of the signal level of an input signal supplied via a signal input terminal. The drain voltage is supplied as a signal to an output circuit. The output circuit is supplied via a power source terminal with a third voltage, and via another power source terminal with a fourth voltage. Conduction and cutoff of a transistor of the output circuit is determined on the basis of the signal level of the signal supplied to the output circuit, and the third and fourth voltages are selectively outputted as an output signal of the output circuit.