The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2000

Filed:

Nov. 12, 1998
Applicant:
Inventors:

Eiichi Takahashi, Matsuzaka, JP;

Yasunori Nishimura, Nara, JP;

Tadanori Hishida, Kashihara, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G02F / ;
U.S. Cl.
CPC ...
349 40 ;
Abstract

A liquid crystal display device includes: an array substrate; a counter substrate facing the array substrate; and a liquid crystal layer interposed between the array substrate and the counter substrate, wherein the array substrate includes: a plurality of pixel electrodes arranged in a matrix in a display region; a plurality of gate lines; a plurality of source lines which cross the plurality of gate lines; an insulating layer provided between the plurality of gate lines and the plurality of source lines; a plurality of switching elements respectively connected to respective ones of the plurality of the gate lines, the plurality of source lines, and the plurality of pixel electrodes; and a short ring, a plurality of first inspection signal voltage input terminals and a plurality of depletion-type thin film transistors (DTFT) provided in a peripheral region adjacent the display region, and wherein each of the plurality of gate lines and the plurality of source lines is connected to the short ring via respective ones of the plurality of first inspection signal voltage input terminals and respective ones of the plurality of depletion-type thin film transistors, and the plurality of depletion-type thin film transistors is located between the short ring and the plurality of first inspection signal voltage input terminals, the plurality of depletion-type thin film transistors control electrical conduction between the short ring and the plurality of gate lines and source lines.


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