The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 15, 2000

Filed:

Jan. 20, 1998
Applicant:
Inventor:

John C Ciccone, Scottsdale, AZ (US);

Assignee:

VLSI Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L / ;
U.S. Cl.
CPC ...
327143 ; 327198 ;
Abstract

A single-ended power supply under-voltage level detection circuit included first and second stages of devices stacks coupled between a power supply signal and a reference potential. As the power supply increases it overcomes device threshold voltages in the first stage causing it to enable the second stage. As the power supply signal continues to increase and reaches a second voltage level, the second stage outputs a level indicator signal which indicates that the power supply is greater than or equal to a predetermined voltage level. A power-down signal can be externally applied to devices in the first and second stages so as to disable the detection circuit no matter what the power supply signal level is. In addition, the detection circuit can be used in a power-on-reset (POR) circuit to detect when the power supply has reached a predetermined voltage level so as to cause the POR circuit to output a POR signal an extended time interval afterwards.


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