Logic circuit conversion method and logic circuit design support device

Abstract

A logic circuit simulation device comprises a connection analyzer for detecting circuit connection data from an input logic circuit description, an asynchronous element detector for detecting an asynchronous element in the input logic circuit description, a grouping area determination section for determining a grouping area in the logic circuit from which the asynchronous element is excluded, a grouping section for executing grouping for the determined grouping area, and a simulator for simulating operation of a logic circuit on the basis of the logic circuit having undergone grouping. This prevents a single event execution unit from being repeatedly executed within one simulation cycle. Since signal processing associated with the transfer of values between event execution units is replaced with variable processing, high-speed processing can be performed. Since the number of event execution units decreases, the number of times an event execution unit is registered in an event queue and a registered event is extracted from the event queue decreases.