The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 01, 2000
Filed:
Sep. 17, 1997
Neal Glover, Broomfield, CO (US);
Cirrus Logic, Inc., Fremont, CA (US);
Abstract
A cost reduced finite field processor is disclosed for computing the logarithm LOG.sub..alpha. (.alpha..sup.j) of an element of a finite field GF(2.sup.n) using significantly less circuitry than that required by a lookup table typically employed in the prior art. The result of the logarithm (i.e., the exponent of .alpha..sup.j) is represented as a binary number computed serially one bit per clock cycle. In one embodiment, combinatorial logic is used to compute bit 0 of the exponent. On each clock cycle, the exponent is shifted once to the right and bit of the exponent is extracted until the entire exponent has been computed. Shifting the exponent of a field element to the right is carried out by taking the square root of the element. The present invention requires at most n+1 clock cycles to compute LOG.sub..alpha. (.alpha..sup.j), with one embodiment requiring n/2 clock cycles. The circuitry for computing the square root of a field element and for computing bit 0 of the logarithm of a field element is significantly less than that required to implement the logarithm operation using a lookup table.