The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2000

Filed:

Jun. 25, 1997
Applicant:
Inventors:

Herbert Lopez-Aguado, Sunnyvale, CA (US);

Denise Chiacchia, Campbell, CA (US);

Gary Lauterbach, Los Altos Hills, CA (US);

Assignee:

Sun Microsystems, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
711137 ; 711213 ; 711118 ; 711120 ; 711122 ; 711125 ; 712207 ;
Abstract

A central processing unit (CPU) of a computer has a data caching unit which includes a novel dual-ported prefetch cache configured in parallel with a conventional single-ported data cache. In response to a data cache miss, the requested data is fetched from external memory and loaded into the data cache and into the prefetch cache. Thereafter, if a prefetch cache hit occurs, the physical address of the corresponding data request is provided to a prefetch engine which, in turn, adds a stride to the physical address to derive a prefetch address. This prefetch address identifies data which is predicted to be soon requested in subsequent instructions of the computer program. Data corresponding to the prefetch address is then retrieved from external memory and loaded into the prefetch cache. This prefetching operation frequently results in the prefetch cache storing data that is requested by subsequently executed instructions in a computer program. When this condition occurs, data is immediately retrieved from the prefetch cache and provided to execution units within the CPU, thereby eliminating latencies associated with external memory.


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