Phase detector for carrier recovery in a dqpsk receiver

Abstract

A phase detector using simple arithmetic operations to measure phase errors in the carrier-recovery mechanism for a DQPSK digital communications receiver. The carrier-recovery mechanism is a feedback loop that provides a synchronization between the oscillators in the transmitter and receiver of the communications system; the phase detector measures deviations from this synchronization and generates a phase-error signal used in the feedback loop to synchronize the oscillators. To perform this measurement, the phase detector takes the received signal as input and compares it against a local oscillator in the receiver to generate two digital signals: the in-phase (I) and quadrature-phase (Q) components of the received signal. These signals are the input to a logic unit, which uses these two signals to determine the phase-error signal. In one embodiment of the phase detector, the logic unit analyzes the signs of the two digital signals and then accordingly adds or subtracts the I and Q signals to generate the phase-error signal. In another embodiment, the logic unit determines the magnitude of the phase-error signal by finding the difference in magnitudes of the two digital signals and constructing a phase-error signal proportional to this difference. The logic unit then determines the sign of the phase-error signal by analyzing the signs of the I and Q digital signals. The logic unit thus uses simple arithmetic operations to generate the phase-error signal, thereby reducing the complexity and cost of the phase detector.