The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 01, 2000

Filed:

Sep. 20, 1999
Applicant:
Inventors:

Akio Takeda, Tokyo, JP;

Yasuhiro Kurosawa, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04M / ;
U.S. Cl.
CPC ...
34031002 ; 34031006 ; 34082516 ;
Abstract

A fault locator of a parallel transmission line includes a data receiving unit that receives the transmission and the received signal of each current differential relay provided with the transmission line, and measures the receiving timing of the transmission signal from a self-terminal. A fault detecting unit judges fault detection on the transmission line based on current data received with the data receiving unit, and outputs a starting signal. A data memory unit stores a predetermined fault generating range of a quantity of electric data of each self-terminal previously stored and an other side terminal when the quantity of electric data of each self terminal received with the data receiving unit and the other side terminal are stored and a starting signal is received. A synchronous correction unit, based on information on the receiving timing measured with the data receiving unit at the time of data reception of a self-terminal transmission signal, performs synchronous correction processing between each line to the stored memory. A setting unit inputs an impedance value and the line-length for three-phases as a setting value. A fault location unit performs fault location, using impedance setting for three-phases and line-length setting which were set with the stored memory data and the setting unit and the synchronous correction processing between each line that was performed in the synchronous correction unit.


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