The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 01, 2000
Filed:
Jan. 12, 1998
Masachika Masuda, Tokorozawa, JP;
Michiaki Sugiyama, Tokyo, JP;
Hitachi, Ltd., Tokyo, JP;
Hitachi ULSI Engineering Corp., Tokyo, JP;
Abstract
Disclosed is a packaged semiconductor device, e.g., of the lead-on-chip type, having reduced thickness, by providing only an adhesive (without a base film) between inner lead portions of the leads and the semiconductor chip to adhere the inner-lead portions to the chip. The adhesive can cover a dicing area of the semiconductor chip, and, in general, can cover edge parts of the chip (and extend beyond the edge of the chip) to prevent short-circuits between the inner lead portions and the semiconductor chip. The outer lead portions have a lower outer end part and a part, closer to the package body, which extends upward obliquely; has stopper members on the obliquely extending part; and has an obliquely extending part with a greater width than a width of the outer end parts of the outer lead portions, to facilitate stacking of packaged semiconductor chips on each other, e.g., for mounting on a printed circuit board. Packaged semiconductor chips having, e.g., outer lead portions with a part that extends upward obliquely, can be mounted on opposed sides of a printed circuit board while facing in the same direction, thereby simplifying wiring of the device.