The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 01, 2000
Filed:
Aug. 03, 1998
Choul-su Kim, Kyonggi-do, KR;
Woo-sik Kim, Kyonggi-do, KR;
Byung-woo Woo, Kyonggi-do, KR;
Masaharu Tsukue, Kyonggi-do, KR;
SamSung Electronics Co., Ltd., Kyungki-do, KR;
Abstract
Any one of at least two holding blocks loaded in a holding block storing portion is picked up and moved to cover an IC on a PCB of a PCB array. A light beam is applied to the whole surface of the PCB. The holding block is moved from the PCB to the holding block storing portion and cooled. It is then determined whether any other PCB to be soldered exists in the PCB array. If it is determined that any other PCB to be soldered exists in the PCB array, another holding block is picked up from the holding block storing portion and moved to cover an IC on the PCB of the PCB array. The above steps are repeated until all the PCBs of the PCB array to be soldered are completely soldered. If it is determined that any other PCB to be soldered does not exist in the PCB array, the PCB array is transferred to a subsequent process.