The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 25, 2000

Filed:

Apr. 28, 1997
Applicant:
Inventors:

Shuji Abe, Saitama-ken, JP;

Hideki Oto, Saitama-ken, JP;

Toshimasa Adachi, Kanagawa-ken, JP;

Katsuya Kudo, Saitama-ken, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N / ; H04N / ; H03L / ;
U.S. Cl.
CPC ...
348731 ; 348505 ; 348536 ; 4551911 ; 455260 ; 455265 ;
Abstract

A tuner circuit comprising a first frequency conversion means 14 for converting a high frequency input signal into a first intermediate frequency signal according to a first local oscillation signal, a second frequency conversion means 19 for converting the first intermediate frequency signal from the first frequency conversion means 14 into a second intermediate frequency signal according to a second local oscillation signal, a first PLL means 24 for controlling the first local oscillation signal so as to synchronize the phase of the signal with that of a reference oscillation signal having a fixed frequency, a second PLL means 31 for controlling the second local oscillation signal so as to synchronize the phase of the signal with that of a reference oscillation signal. In the first PLL means 24, a phase comparison frequency is set to a frequency higher than a specified value. In the second PLL means 31, a phase comparison frequency is set to a frequency lower than a specified value.


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