The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 25, 2000
Filed:
Dec. 23, 1998
Applicant:
Inventor:
Kazuo Noda, Tokyo, JP;
Assignee:
NEC Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L / ;
U.S. Cl.
CPC ...
327333 ; 326 68 ; 326 81 ;
Abstract
A voltage converting buffer circuit includes an inverter for receiving an input data signal to output an inverted data signal, a flip-flop having first and second branches for receiving the input data signal and the inverted data signal, and pull-up transistors for assisting the flip-flop function at the output node when the flip-flop function occurs by a transistor having a smaller driving capability. The pull-up transistors have a conductivity same as the conductivity of transistors having the smaller driving capability. A high-speed flip-flop function can be obtained during a high-to-low or low-to-high signal transition of the input data signal.