The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 25, 2000

Filed:

Oct. 07, 1998
Applicant:
Inventors:

Hsin-Chuan Tsai, Taipei, TW;

Yinan Chen, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
438253 ; 438238 ; 438240 ; 438255 ; 438381 ; 438397 ; 438398 ; 438396 ; 438386 ; 438634 ;
Abstract

A method of fabricating a stack crown capacitor of a dynamic random access memory (DRAM) cell by using an oxynitride mask is disclosed. First, a dielectric layer and a silicon nitride layer are sequentially deposited over a substrate with an electrical device. Next, forming a contact in the silicon nitride layer and the dielectric layer, and depositing a first polysilicon layer to fill the contact. Next, depositing an oxide layer and an oxynitride layer sequentially, and then defining a bottom electrode pattern for etching the oxynitride layer and the oxide layer. Then, laterally etching the oxide layer, and depositing a second polysilicon layer. Next, etching the second polysilicon layer and the first polysilicon layer by using the oxynitride layer as a mask to form the bottom electrode. Next, removing the oxynitride layer, the oxide layer and partial silicon nitride layer. Finally, forming an interelectrode dielectric layer and a top electrode.


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