The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 18, 2000

Filed:

Nov. 13, 1998
Applicant:
Inventor:

Prashant Shamarao, Atlanta, GA (US);

Assignee:

Integrated Device Technology, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 27 ; 326 83 ; 326 57 ;
Abstract

Integrated circuit output buffers include first and second pull-down switches and a preferred pull-down control circuit which utilizes a preferred feedback technique to facilitate a reduction in simultaneous-switching noise during pull-down operations and also improve the impedance matching characteristics of the output buffers during DC conditions. The preferred feedback technique also limits the degree to which external noise can influence operation of the pull-down control circuit. First and second pull-up switches and a pull-up control circuit are also provided to improve simultaneous-switching noise and impedance matching characteristics during pull-up operations in a similar manner. The first and second pulldown switches are electrically connected in parallel between an output of the buffer and a first reference signal line (e.g., Vss) and the first and second pull-up switches are electrically connected in parallel between an output of the buffer and a second reference signal line (e.g., Vdd). The pull-down and pull-up switches may comprise NMOS and PMOS transistors, respectively.


Find Patent Forward Citations

Loading…