The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 2000
Filed:
Mar. 13, 1998
Applicant:
Inventors:
Yasuo Moriguchi, Tokyo, JP;
Hiroyuki Mori, Tokyo, JP;
Yoshio Inoue, Tokyo, JP;
Toshinori Inoshita, Tokyo, JP;
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ; G06F / ; G06F / ;
U.S. Cl.
CPC ...
714724 ; 714741 ; 39550035 ; 39550036 ;
Abstract
A logic verification apparatus for a semiconductor integrated circuit classifies a program described in HDL into connection information of a synchronous circuit portion and connection information of a asynchronous circuit portion, converts a portion of the connection information of the asynchronous circuit portion into the connection information of the synchronous circuit portion and increases circuit portions the function of which can be verified by a cycle based simulation/static timing verification unit, thus making it possible to shorten the time for verification.