The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2000

Filed:

Nov. 03, 1997
Applicant:
Inventors:

Harry A Burns, Marshalltown, IA (US);

Brent H Larson, Marshalltown, IA (US);

Larry K Brown, Marshalltown, IA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
702188 ; 702 91 ;
Abstract

A schematic generator for use in a process control network, in which control functions are implemented by field devices interconnected at various and distributed locations on a bus, polls each of the field devices to retrieve information pertaining to the identity of the device, the identity of the control functions associated with the device, the manner in which the device communicates with other devices with respect to each of the control functions associated with that device, the timing associated with the execution of each of the control functions of that device and the timing of the communication activities associated with each of the control functions of that device. The schematic generator then analyses the retrieved data to identify the manner in which the devices are physically connected on the bus and the manner in which the different control functions are interconnected over the bus to perform process control loops within the process control network. Thereafter, the schematic generator creates one or more schematics, such a maintenance schematic illustrating the physical layout of the field devices in the process control network, a control loop schematic illustrating the interconnections between functions within one or more of the deceives that form a control loop, and a timing schematic illustrating the timing of or the amount of communications occurring on the bus.


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