The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2000

Filed:

Apr. 13, 1998
Applicant:
Inventors:

Chris B Autry, Bridgewater, NJ (US);

Henry W Owen, Smyrna, GA (US);

Michael Wolf, Mundelsheim, DE;

Assignee:

Alcatel, Paris, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L / ; H04L / ; H04L / ;
U.S. Cl.
CPC ...
375372 ; 370506 ; 370516 ;
Abstract

An apparatus, to be used in a desynchronizer, for minimizing the output jitter of the desynchronizer. The desynchronizer is assumed to include a bit buffer for staging data that is to be output. The desynchronizer is also assumed to include a means for decoding the input signal to determine how justification opportunities in the input signal are used and therefore what justification bits must be leaked by the desynchronizer. The apparatus and method of the present invention uses the information about the incoming justification bits or incoming justification bytes and the state of the buffer to determine the longest possible time to wait before issuing a command to momentarily speed up or delay outputting the next data unit from the bit buffer. This speeding up or delay is caused by sending a clock signal to the bit buffer that is shifted in phase by a small amount, thereby spreading out the effect of an incoming positive or negative justification bit or byte over many periods of the output clock of the desynchronizer.


Find Patent Forward Citations

Loading…