The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2000

Filed:

Jul. 28, 1998
Applicant:
Inventor:

John Desmond Ainsworth, Staffordshire, GB;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M / ;
U.S. Cl.
CPC ...
363 39 ; 363 40 ; 363 98 ;
Abstract

A switching control arrangement for a multilevel convertor minimizes the harmonic content of the converter voltage or current by an open-loop and/or a closed-loop control of the timing of the switching of the GTOs associated with the energy-storage components (e.g. capacitors) in the convertor. In a first open-loop arrangement the convertor current is quantized over its working range and different threshold values are provided in dependence on the quantization values of the current. In a second open-loop arrangement a continuous, non-quantized control is provided based on at least a quadratic approximation to the desired current-dependent behavior of the GTO switching angles. In a third, closed-loop arrangement, different GTO-switching threshold levels are provided as controlled by a Fourier integration process involving the nulling of those harmonics desired to be nulled. The control arrangement is applicable to chain or stacked-capacitor multilevel convertors and can be employed in SVC applications or applications in which the convertor draws real power as well as reactive power.


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