The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 2000
Filed:
May. 06, 1999
Binan Wang, Tucson, AZ (US);
Burr-Brown Corporation, Tucson, AZ (US);
Abstract
Circuitry in an amplifier (1) provides both auto-zeroing of offset errors and finite gain compensation. The circuitry includes a differential main amplifier (3) and a differential auxiliary amplifier (13). During a first phase (.phi.1), a previously sampled input voltage is amplified by the main amplifier to produce an output voltage on a first capacitor (C3). A stored prior offset correction voltage stored on a second capacitor (C4A) is applied between the inputs of the auxiliary amplifier, an output of which is coupled to an auxiliary input of the main amplifier to auto-zero its offset voltage. During a second phase (.phi.2) the inputs of the main amplifier are short-circuited together, causing it to produce a voltage change on one terminal of the first capacitor (C3), the other terminal of which is switched from ground to one terminal of a second capacitor (C4). This stores updated offset correction voltage on the second capacitor (C4). Since the previous output voltage of the main amplifier remains stored on the first capacitor (C3) during the second phase, the auto-zeroing correction is referenced to the previous value of the output voltage, resulting in compensation for distortion caused by non-linearity of the main amplifier.