The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 11, 2000
Filed:
Dec. 08, 1998
David D Briggs, Dallas, TX (US);
Fernando D Carvajal, McKinney, TX (US);
Chao-Chih Chiu, Taipei, TW;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The invention is a multiplex circuit for outputing two or more signals of different levels to a common output pad where a first output driver (D.sub.h) is powered from a voltage rail having a higher voltage than at least one second output driver (D.sub.1) power by a lower voltage rail. An interface circuit (IFC) and level shift circuit provides two output signals base on a single input signal, one signal being equivalent to the voltage of the higher voltage (V.sub.High) and the other being based on the lower voltage (V.sub.low). PMOS device connected to the output pad has its back gate connected to V.sub.high to prevent leakage current through the PMOS device when the output to the output pad (P.sub.1) is equivalent to V.sub.High.