The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 2000
Filed:
Nov. 17, 1997
Applicant:
Inventor:
James Kubinec, Reno, NV (US);
Assignee:
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L / ; H03D / ; G06F / ; H03K / ;
U.S. Cl.
CPC ...
375362 ; 375373 ; 375376 ; 327291 ; 327298 ; 327113 ; 327114 ; 327144 ; 327153 ; 327161 ; 327162 ;
Abstract
A clock generating system used to generate a clock signal which compensates for chip operating conditions. The system includes a delay line oscillator and a reference clock which determines the actual propagation time of delay elements on the chip. A clock generator which includes a number of serially connected delay units uses this information to generate a clock signal for the chip logic functions. The output clock rums the chip logic functions at the proper frequency for the current chip conditions.
Kubinec, James. (2000). Chip operating conditions compensated clock generation (U.S. Patent No. 6084933). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6084933
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile