The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 2000
Filed:
Jul. 06, 1999
Adam Kablanian, San Jose, CA (US);
Virage Logic Corp., Fremont, CA (US);
Abstract
A multiple bank memory array includes a combined memory array, an X-decoder, a first word-line driver, a second word-line driver, a reference column, a Y-multiplexer and pre-charging circuit, a sense amplifier and input/output circuit, and control and precoding logic. Signals are received and applied to the combined memory array and the other components via the control and pre-decode logic and the input/output circuit. The control and pre-decode logic receives control signals to control and address the combined memory array, and uses a single bit for two dimensional decoding. This architecture for multiple bank memory cell arrays a novel technique for word-line banking in one embodiment that provides a combined array, does not require routing and eliminates redundant reference columns.