The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2000

Filed:

Feb. 02, 1999
Applicant:
Inventors:

Yuichi Matsushita, Miyazaki, JP;

Kenji Satou, Miyazaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
3652257 ; 365200 ; 36523006 ; 36523004 ;
Abstract

A semiconductor device includes plural fuse wiring paths which extend substantially parallel to each other in a first direction, each of the fuse wiring paths having a fuse element. A normal column line extends in a second direction substantially perpendicular to the first direction, the normal column line corresponding to a normal memory cell which stores data. The semiconductor memory device further includes a redundant column line extending in the second direction, the redundant column line corresponding to a redundant memory cell which stores data. A logic circuit receives respective signals on the plural fuse wiring paths, and outputs a selection signal according to these signals. The semiconductor device also includes a switching circuit coupled between the logic circuit and the normal and redundant column lines, which receives an address signal and the selection signal, and which selectively transfers the address signal to the normal column line or the redundant column line in response to the selection signal.


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