The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 2000
Filed:
Jun. 01, 1999
Akitoshi Kikuchi, Abiko, JP;
Katsutoshi Ushida, Kawasaki, JP;
Canon Kabushiki Kaisha, Tokyo, JP;
Abstract
In a system using a clock synchronous type synchronous DRAM (SDRAM), when a power supply voltage monitoring circuit informs a timing circuit of a decrease in voltage from a main power supply, the timing circuit outputs a self refresh request signal to a CPU. In response to the self refresh request signal, the CPU outputs a clock enable signal synchronous with the system clock, and a self refresh transfer command signal, which is expressed by a combination of states of memory access control signals, to the SDRAM, so as to start up self refresh of the SDRAM. After the self refresh has been started up, the CPU outputs a clock enable mask signal that masks the clock enable signal to switch a clock enable signal to be supplied to the SDRAM from the clock enable signal output from the CPU to a voltage detection signal of a backup power supply. A reset signal then outputs a reset signal to transfer to backup operation.