Method of fabricating deep trench capacitors for dram cells

Abstract

A method of fabricating deep trench capacitors of high density Dynamic Random Access Memory (DRAM) cells is disclosed: first, deep trenches are formed on a silicon substrate by using oxide and nitride as etching masks, then, an ONO capacitor dielectric layer is deposited inside the trench, a first polysilicon layer as storage node is then deposited to fill the bottom of the trench, thereafter, dielectric collars are formed on the sidewalls of the trench, next, a sacrificial stud is formed inside the trench, the dielectric collars are then recessed to expose the contact area for the trench capacitor and access transistor, next, the sacrificial stud is removed by wet etching, followed by a second polysilicon deposition overlaying the first polysilicon, finally, the second polysilicon layer is etchback to a height slightly lower than the substrate surface to complete the trench capacitor formation.