Combined precharging and homogenizing circuit

Abstract

A combined precharging and homogenizing circuit for a semiconductor memory configuration made up of a memory cell array having a multiplicity of bit line pairs. The combined precharging and homogenizing circuit containing a first and a second field-effect precharging transistor and a homogenizing transistor connected in series between the two precharging transistors. Gates of the two precharging transistors and of the homogenizing transistor are connected together to form a common gate. Sources of the precharging transistors are connected together to form a common source. A drain of the first precharging transistor and a drain of the homogenizing transistor are connected together to form a common drain and the source of the homogenizing transistor and the drain of the second precharging transistor are connected together to form a common source/drain. In the combined precharging and homogenizing circuit, the invention provides that the common gate is angled and is configured rotated through about 45.degree. in relation to a longitudinal direction of the bit lines. In addition, the common drain and the common source/drain are drawn forward beyond the common gate defining protruding regions, and that bit line contacts are accommodated in the protruding regions.