The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 2000

Filed:

Jun. 11, 1998
Applicant:
Inventors:

Ryouichi Bandai, Yokohama, JP;

Kenji Sakaue, Yokohama, JP;

Keiko Fukuda, Sumida-ku, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kanagawa-Ken, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327231 ; 327233 ;
Abstract

A semiconductor integrated circuit device has a plurality of functional blocks. Each of the plurality of functional blocks comprises a DLL circuit for outputting a clock signal, at least one wiring portion for receiving the clock signal at one end thereof, and at least one load circuit for receiving the clock signal from the DLL circuit via the wiring portion. The DLL circuit receives a reference clock signal and a wiring portion and outputs the clock signal so that the phase difference between the reference clock signal and the second clock signal is a predetermined value. Thus, clock skew is reduced even if there is variation due to process.


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