The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 2000

Filed:

Jul. 30, 1998
Applicant:
Inventors:

Hideki Usuki, Kanagawa, JP;

Akira Li, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327230 ; 327199 ; 327291 ;
Abstract

An input signal SIN is input to a reset input terminal R of a flip-flop RSFF1 and, at the same time, input to a gate of a pMOS transistor MP1 constituting a transfer control circuit DCNTL1, a signal Bd obtained by delaying an inverted output signal B of the flip-flop RSFF1 at a delay circuit DLY1 is input to the data input terminal of the transfer control circuit DCNTL1, and the output signal of the transfer control circuit DCNTL1 is input to a set input terminal S of the flip-flop RSFF1 via two stages of inverters connected in series, therefore, a signal change detection circuit capable of generating a stable pulse according to the level change of the input signal without depending upon the input clock signal and capable of generating the pulse at high speed can be realized.


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