The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2000

Filed:

Jun. 29, 1998
Applicant:
Inventors:

George M Ansel, Starkville, MS (US);

David R Lindley, Starkville, MS (US);

Jeffrey W Gossett, Columbus, MS (US);

Junfei Fan, MS State, MS (US);

Andrew L Hawkins, San Jose, CA (US);

Michael D Carlson, Livermore, CA (US);

Assignee:

Cypress Semiconductor Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06M / ;
U.S. Cl.
CPC ...
377 26 ; 377 19 ; 377116 ; 365236 ;
Abstract

A memory having a circuit including a built-in address counter with a test mode. The address counter may be used to generate the memory array addressing for the different array test patterns. The circuit may comprise a logic circuit and a counter circuit. The logic circuit may be configured to generate one or more control signals in response to one or more control inputs. The counter circuit may be configured to generate a first counter output and a second counter output in response to (i) the control outputs and (ii) one or more inputs. The counter may comprise a first portion configured to generate the first counter output and a second portion configured to generate the second counter output.


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