The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2000

Filed:

Nov. 18, 1998
Applicant:
Inventors:

Michael J Nielsen, San Jose, CA (US);

Brian Kindle, Sunnyvale, CA (US);

Linda S Gardner, Saratoga, CA (US);

Zahid S Hussain, Palo Alto, CA (US);

Assignee:

Silicon Graphics, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365 63 ; 365 52 ;
Abstract

A memory system that includes a memory controller and memory modules that provide address and control signals to groups of memory components through multiple busses. In one embodiment, each memory module is coupled to an address/control buss. The use of multiple address/control busses provides the necessary bandwidth so as to allow for fast access and control of memory components. Memory components are grouped into banks of memory components with each bank including three memory components. Memory modules are configured with one, two, four, or more banks of memory components on a given memory module. In one embodiment, the memory system includes six 48-bit memory modules that use SDRAM memory components. The six memory modules are used in a set to form a 288-bit memory word. When 16 Mbit or 64 Mbit memory components are used, this configuration gives a range of memory configurations from 32 megabytes to 2 gigabytes.


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