The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2000

Filed:

Sep. 05, 1998
Applicant:
Inventor:

Tsung-Chieh Chen, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
438107 ; 438109 ; 438108 ; 438123 ; 438611 ; 438613 ; 257777 ; 257723 ; 257738 ; 257780 ;
Abstract

A multi-chips semiconductor package and fabrication method mainly combines LOC and BGA techniques to overlap one chip upon another chip in an IC component package. One chip uses leads of a lead frame as connection interface of the circuit in the chip to outside. Another chip uses solder balls as connection interface of the circuit in another chip to outside. The two chips are supported by the lead frame without a substrate used in a conventional BGA package. The two chips may have same or different function. The structure is simple and easy to produce at low cost. The size and length of the IC component is smaller than the one produced by conventional multi-chips packaging techniques.


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