The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 13, 2000
Filed:
Jun. 16, 1998
Yeong-Sheng Lee, Milpitas, CA (US);
Young-Jen Sun, Fremont, CA (US);
Macronix International Ltd., Hsinchu, TW;
Abstract
A portion of a differential charge pump circuit is partially replicated and is utilized as a replica circuit to define the common-mode voltage VCM of the differential output voltages of the charge pump circuit that drives a voltage controlled oscillator (VCO) in a PLL system application, or a voltage-controlled delay (VCD) circuit in a DLL system application. The replica circuit includes a high gain operational amplifier and at least three MOS transistors electrically coupled to the differential charge pump circuit. The operational amplifier generates the DC output voltage VO which is used to define the common-mode voltage VCM of the charge pump circuit. The three transistors are configured in replica of one-half of the charge pump circuit. The operational amplifier is provided with a bias voltage at the inverting-end input terminal. During operation, the high gain of the operational amplifier forces the non-inverting end of the operational amplifier to the same value as the bias voltage supplied to the inverting-end input. This voltage equalization effect is referred to as the replica effect. As a result of the replica effect, the charge pump's DC output voltages OUTP and OUTN follow the voltage at non-inverting end of the operational amplifier which results in stable operation of the differential charge pump and a control circuit which is suitable for high-frequency (greater than 400 MHz) application of phase-locked loop (PLL) and delay-locked loop (DLL) systems applications.