The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2000

Filed:

Jul. 13, 1998
Applicant:
Inventor:

Ko Noguchi, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257758 ; 257774 ; 257750 ; 257752 ; 257760 ;
Abstract

In a semiconductor device, a metal oxide semiconductor (MOS) transistor is formed on a semiconductor substrate to have a gate electrode which is formed on a gate oxide film. The first insulating layer is formed to cover the semiconductor substrate and the MOS transistor. The second insulating layer is formed to cover the first insulating layer. The first wiring structure is formed on the first insulating layer. A part of the first wiring structure passes through the second insulating layer. The second wiring structure is not connected to the first wiring structure, and passes through the first and second insulating layers to be connected to the gate electrode. The second wiring structure has an antenna ratio of equal to or less than 1000. The third wiring structure is connected to the first and second wiring structures and formed on the second insulating layer to have the antenna ratio of equal to or less than 1000. Here, the antenna ratio is a ratio of surface area of a wiring structure to surface area of a gate oxide film.


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