The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2000

Filed:

Feb. 26, 1997
Applicant:
Inventors:

Satoru Taji, Sanda, JP;

Hiroaki Nakanishi, Kobe, JP;

Assignee:

Ricoh Company, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257316 ; 257315 ; 257319 ; 257321 ; 36518515 ; 438257 ;
Abstract

A non-volatile semiconductor memory device includes a substrate and a continuously formed drain diffusion layer and a continuously formed source diffusion layer which are alternately arranged within the substrate. Floating gates are disposed via a tunnel insulating film on the substrate so that they are adjacent to the drain diffusion layer. The floating gates are opposed to each other with the drain diffusion layer therebetween, and spaced away from the source diffusion layer. A control gate extends in a direction orthogonal with a direction in which the source and drain diffusion layers extend, the control gate being formed on the floating gates and the substrate via an insulating film. A select channel is provided between the floating gate closest to the source diffusion layer and the source diffusion layer. A thick insulating film is provided between the drain diffusion layer and the control gate between the floating gates which are opposed to each other with the drain diffusion layer therebetween.


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