The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2000

Filed:

Dec. 22, 1998
Applicant:
Inventors:

Scott W Petrick, Sussex, WI (US);

Robert F Kwasnick, Palo Alto, CA (US);

Rowland F Saunders, Hartland, WI (US);

Habib Vafi, Waukesha, WI (US);

David C Neumann, Milwaukee, WI (US);

Assignee:

General Electric Company, Milwaukee, WI (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01R / ;
U.S. Cl.
CPC ...
29825 ; 257488 ; 257518 ;
Abstract

A method is provided for maximizing substrate usage in the fabrication of flat panel displays or detectors, while also maximizing electrostatic protection for the displays or detectors. Initially, at least two detectors are positioned on the substrate, with each of the detectors having a guard ring of a certain width. At least a section of the guard ring width of one detector is approximately adjacent to a section of the guard ring width of another detector. The approximately adjacent guard ring width sections are then positioned such that a maximum overlap of the adjacent guard ring width sections is achieved, while still providing each display or detector with electrostatic discharge protection. Each of the detectors is separated from the other detectors and the remainder of the substrate by the process of scribing partially through the substrate and breaking at the scribe mark or by sawing.


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