The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2000

Filed:

May. 12, 1998
Applicant:
Inventors:

Calvin L Adkins, Malabar, FL (US);

Donald K Belcher, West Melbourne, FL (US);

Assignee:

Harris Corporation, Palm Bay, FL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01P / ;
U.S. Cl.
CPC ...
333-1 ; 333238 ; 333246 ;
Abstract

A waveguide structure and associated method for forming the waveguide structure is disclosed. The waveguide structure is formed from at least two dielectric layers having opposing, substantially planar faces and an intermediate signal path layer positioned between the faces. A conductive layer is formed on each of the opposing, substantially planar faces to form outer ground planes. At least one controlled impedance signal track is formed at the intermediate signal path layer. A plurality of conductive vias extend through the dielectric layers and interconnect the ground planes. The vias form a 'sea' of vias, which provide enhanced waveguide mode rejection. A plurality of grounding lines interconnect the vias at the intermediate signal path layer. A conductive via is connected to all adjacent conductive vias outside the controlled impedance signal track to form an inner grounding line grid that is coplanar with the controlled impedance signal track for waveguide mode rejection. The waveguide structure can be formed from two dielectric layers laminated together, and the grounding lines and controlled impedance signal track can be formed by using standard photolithography methods consisting of substrate etching and/or additive processes.


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