The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2000

Filed:

Jun. 18, 1999
Applicant:
Inventor:

Takeshi Fukuda, Kanagawa, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327313 ; 327314 ; 327327 ; 391 56 ;
Abstract

A SUB wiring provided outside of a common discharge line formed on outer periphery of a chip in parallel to the latter. To the common discharge line, only voltage clamping elements and diode elements as electrostatic protection elements are connected. The common discharge line is in floating condition for rising withstanding voltage. On the other hand, to the SUB wiring, additional circuits, such as BBG circuit and so forth, consisting of transistors are connected to connect the latter to the substrate. With these two wirings, the width of the common discharge line can be made narrower to limit an increase of a chip area. By this, it is possible to improve resistance to electrostatic breakdown without increasing chip area.


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