The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2000

Filed:

Jun. 05, 1998
Applicant:
Inventors:

Naoichi Kitakami, Tokyo, JP;

Hiroki Takahashi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ; G06F / ; G06F / ; G06F / ;
U.S. Cl.
CPC ...
710129 ; 710 36 ; 710 38 ; 710100 ; 710131 ; 708139 ; 708168 ; 709232 ; 709238 ; 712225 ;
Abstract

A serial I/O incorporated semiconductor device comprises a transmitting unit 4 including a transmission channel selection register 14 for selecting a transmitting pin to output transmit data and a receiving unit 5 including a receiving channel detection circuit 26 for detecting receiving pins that have received data; a receiving channel flag 27 set to have a predetermined value by the receiving channel detection circuit; a plural channels reception detection circuit 28 for detecting that received data is entered to a plurality of receiving pins; and a plural channels receiving flag 29 set to have a predetermined value by the plural channels reception detection circuit 28 detecting received data has been entered to the plurality of receiving pins; wherein when any one of the flags 23, 25, and 29 is set to a predetermined value, the receiving unit supplies the value to a CPU as a reception interrupt signal.


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