The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 30, 2000
Filed:
Sep. 30, 1997
Gunter Fendt, Schrobenhausen, DE;
Peter Hora, Schrobenhausen, DE;
Norbert Muller, Schrobenhausen, DE;
Gerhard Wagner, Schrobenhausen, DE;
Telefunken Temic microelectronic GmbH, Heilbronn, DE;
Abstract
In the case of a data transmission system for the exchange of digital data between a central processor unit and several peripheral control modules which are connected to the former by a bus system such that communication is enabled and which are provided for the purpose of activating one each, respectively, out of several safety devices such as airbags or belt tensioning systems, or similar devices, in a motor vehicle, and wherein these peripheral control modules are each provided with one buffer capacitor whose energy content is sufficient for operating the respective module, and the device driven by this module, within specifications over a limited period of time, the bus system is designed as a single wire system for the purpose of achieving a simple setup and reducing installation and fitting costs. In this single wire system the control modules are supplied with electrical operating energy, and digital data are transmintted, by the same line sections. In the data communications mode of the central processor unit and the control modules, the energy supply of the modules is effected by their buffer capacitors. The transmission of the digital data from the central processor unit to the control modules as well as the passing on of such data is effected by modulating a direct voltage whose maximum level U.sub.S is significantly lower than the maximum voltage level U.sub.B up to which the buffer capacitors can be recharged. The recharging of the buffer capacitors is effected in charge mode periods nested in between transmission operation phases of the central processor unit and the peripheral control modules.