The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2000

Filed:

Oct. 21, 1997
Applicant:
Inventors:

Jiyang Liu, Westford, MA (US);

Robert Gottlieb, Westford, MA (US);

Andrew E Ayers, Amherst, NH (US);

Assignee:

Hewlett-Packard Co., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395709 ; 395705 ;
Abstract

A compile method employs loop fusion to improve execution of a first loop and a second loop in a code sequence. A compile method initially peels one or more loop iterations from one of the loops to cause each of the loops to exhibit an equal number of loop iterations. Thereafter, an attempt is made to fuse the first and second loops, upon a condition that the resulting fused loop produces a same computational result as would be produced if the first loop and second loop were not fused. If the condition is not met, a loop reversal is performed on one of the loops and a fusing action is again attempted; if the attempted fusing action of the loops does not fulfill the condition, a loop reversal is performed on the other loop and a fusing action is again attempted. The combined loop peeling/loop reversal actions provide a higher probability of an ability to fuse the loops than otherwise.


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