The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 30, 2000
Filed:
Dec. 23, 1998
Applicant:
Inventors:
Victor G Mycynek, Des Plaines, IL (US);
Gary J Sgrignoli, Mt. Prospect, IL (US);
Assignee:
Zenith Electronics Corporation, Glenview, IL (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L / ; H04L / ;
U.S. Cl.
CPC ...
329308 ; 329309 ; 331 / ; 331 12 ; 331 23 ; 348726 ;
Abstract
A FPLL has an I, a Q and a third multiplier, with the I multiplier supplying demodulated signals to a limiter and the Q multiplier supplying signals to a loop filter. A VCO and phase shift circuit supply quadrature signals to the I and Q multipliers. The analog input signal is applied to the I multiplier and to the third multiplier. The third multiplier, which is located in an AC path in the loop to avoid the effects of offsets due to stray DC voltages and currents, is also supplied with the digital output of the limiter. The third multiplier supplies its output to the Q multiplier.