The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 23, 2000
Filed:
May. 14, 1998
Thao M Hoang, Denton County, TX (US);
Compaq Computer Corporation, Houston, TX (US);
Abstract
An adaptive interface controller including a plurality of MII ports operable at either one of the first and second transmission rates, a corresponding plurality of Manchester ports operable at the first transmission rate and an MII interface operable at the second transmission rate. The adaptive interface controller includes first select logic that provides data from an active one of the MII ports for one of the Manchester ports or to the MII interface depending upon the transmission rate. Manchester encoding logic is provided to receive data from the first select logic for an active port, to convert the data to Manchester format and to provide the encoded data to a corresponding one of the Manchester ports. Second select logic provides data transmitted to the MII interface for a selected one of the MII ports. Manchester decoding logic detects Manchester encoded data transmitted to any of the Manchester ports and converts the encoded data a serial to bit stream. Third select logic provides received data from either one of the Manchester decoding logic and the second logic to a corresponding one of the MII ports. The encoding and decoding logic are part of communication apparatus which includes respective FIFO memories that each include enough data bits deep to prevent data loss in spite of timing variations between different clock signals during transmission of data bits. Each FIFO also includes a valid bit for each data bit to identify the extents of transferred packets.