The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2000
Filed:
Jun. 15, 1998
Earl James Copple, Arlington Heights, IL (US);
John Michael Rein, Elgin, IL (US);
Northrop Grumman Corporation, Los Angeles, CA (US);
Abstract
A square wave power inverter includes a transformer having a primary winding and a secondary winding, first and second input voltage sources, and a pair of power switching transistors connected series between the first and second voltage sources for selectively connecting the first and second input voltage sources to the primary winding of the transformer. A pair of output terminals is connected to the secondary winding of the transformer for receiving a load. An inverter control is connected to the gates of the switching transistors for generating a gate drive signal. The inverter control generates a low impedance, substantially square wave, gate drive signal, producing a substantially square wave inverter output when a substantial load is connected to the output terminals, and a high impedance gate drive signal, producing a trapezoidal inverter output when a light load is connected to the output terminals. In particular, the inverter control is connected to the output terminals, and produces low impedance drive signal when the voltage at the output terminals is below a predetermined threshold, and high impedance drive signals when the voltage at the output terminals is above the predetermined threshold. The inverter control includes a low impedance gate drive that is connected to the gates of the switching transistors when a substantial load is connected to the output terminals, and a higher impedance gate drive that is connected to the gates of the switching transistors when a light load is connected to the output terminals.