The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2000
Filed:
Dec. 21, 1998
Mehrdad Nayebi, Palo Alto, CA (US);
Stephen D Edwards, San Jose, CA (US);
Phil Shapiro, Palo Alto, CA (US);
Sony Corporation of Japan, Tokyo, JP;
Sony Electronics, Inc., Park Ridge, NJ (US);
Abstract
A current source circuit for providing a stable current into a filter element of a phase-lock-loop circuit of a clock generator. The current source circuit comprises a first resistor coupled to a voltage supply. The emitter of a first transistor is coupled to the first resistor; the collector is coupled to a capacitor which is part of the filter elements of the phase-lock-loop. Current flows from the voltage supply through the first resistor and first transistor into the capacitor. Leakage current flowing out of the capacitor due to the inherent Rcb impedance associated with the first transistor is directed to a path provided by a second transistor. The second transistor has an emitter coupled to the base of the first transistor and a collector coupled to the capacitor. The second transistor is biased such that the Rcb leakage current is directed back into the capacitor. Thereby, the Rcb leakage current flowing out from the capacitor is canceled by the current flowing back into the capacitor via the second transistor. This produces a more stable current, and hence, more stable voltage being maintained by the capacitor. A more stable voltage means that the capacitor can be made smaller. In turn, this enables the phase-lock-loop to be fabricated on-chip with the rest of the clock generator, thereby minimizing its susceptibility to external noise and interferences. Furthermore, a more stable voltage across the filter element of the phase-lock-loop reduces unwanted jitter in the clock signal.